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I/O Timing

I/O Timing

When the computer needs to send data to an output device, that device is usually waiting for data with nothing else to do. When an input device needs to send data to the computer, the computer is probably busy with other things. There must be a system where the computer can tell when an input device needs to send data, so the computer can stop what it is doing and process that data.  

Device polling  

A computer can find out if an input device needs attention by polling. The computer frequently stops what it is doing and checks each input device to see if any data awaits input. This is like checking your telephone every few minutes to see if someone is on the line trying to talk to you. It is an efficient way to handle input requests if input devices are very busy but inefficient if they only need attention occasionally.  

Interrupts  

An interrupt is a signal to the processor to stop what it is doing and temporarily do something else. Interrupts can come from hardware, such as the mouse or keyboard, or from an interrupt instruction (a software interrupt). When an interrupt is received, the processor will store its registers on the stack and jump to a predetermined address where the interrupt service routine is stored. It follows whatever instructions it finds there until it encounters a return from interrupt (RTI) instruction. Then it reloads all the registers with data on the stack and returns to what it was doing (goes back to the address in the program counter that it just retrieved from the stack) when it received the interrupt.  

Interrupts are typically used to tell the computer that an input/output device needs attention. For example, every time you press a key on the keyboard, the keyboard controller chip sends a signal to the interrupt wire of the microprocessor. The microprocessor stops what it is doing and jumps to the interrupt service routine to process the interrupt. A modern computer has an interrupt subsystem that can handle interrupts from many input devices. The interrupt wire on the microprocessor is controlled by a series of interrupt controller chips that communicate with the processor to direct it to the correct service routine for the interrupting device.

Extra material  

Input and output connections  

Devices on the motherboard  

With either memory-mapped I/O or port-mapped I/O, the microprocessor must connect the address and data buses to the I/O subsystem to connect to peripherals. This is done so that when a particular memory address is specified on the address bus, the data bus is actually attached to a peripheral device instead of the memory subsystem. This is partially explained in the example above using the joystick ports of the Atari 8-bit computers.

Typically, when the microprocessor accesses a memory location, the address of that location is put on the address bus. A matrix of logic gates causes the correct memory chips to be activated and connected to the data bus. Then, the microprocessor can manipulate the data as needed. When the microprocessor is performing input or output, the instruction will specify an address that actually connects to an I/O device (the programmer must know precisely what address connects to the device). The matrix of logic gates causes the data bus to be connected to the I/O device bus instead of memory chips.  

If the I/O device in question is part of the motherboard, all of this is handled by the motherboard and probably doesn't require any configuration. For example, the keyboard controller is a permanent part of the motherboard of most computers, so no configuration is required to make the keyboard controller work.  

The input/output sequence  

Getting a key code when a key is pressed is a typical input/output sequence. It goes something like this:  

When a key is pressed, the keyboard controller processes the information from the keyboard and sends an interrupt signal to the microprocessor. 
  1. The microprocessor stores its registers on the stack and jumps to the interrupt service routine. This routine contacts the programmable interrupt controller to see where to go to service the particular interrupt. In this case, it is directed to the keyboard service routine.

  2. The microprocessor jumps to the keyboard service routine. The main part of the keyboard service routine is an instruction to move the contents of a specific memory address to an internal register. When the microprocessor executes this instruction, the memory address is put on the address bus. The logic matrix that decodes memory addresses causes the keyboard controller to connect to the data bus (an address in memory actually connects to the keyboard controller). When the microprocessor retrieves the data from the data bus, it is treated like any other data from memory.

  3. The next instruction moves the data from the keyboard controller to a location in memory used for the key buffer. This is several bytes of memory where key codes are stored until the active program is ready for them.

  4. The service routine ends with an RTI instruction, and the microprocessor retrieves its registers from the stack and returns to what it was doing when the key was pressed.
The main part of the keyboard service routine is an instruction that gets data from memory and puts it in a microprocessor register. The microprocessor has no way of knowing that the data is actually coming from a hardware device (the keyboard controller) rather than a memory chip. Therefore, the computer hardware is designed to automatically redirect the microprocessor to the hardware device when the appropriate address is specified.

The expansion bus

Most computers provide an expansion bus to connect I/O devices to the motherboard. This expansion bus simply connects to all the connections necessary for the microprocessor to perform an I/O function. These connections are mainly the address bus, the data bus, and the interrupt subsystem.  

The expansion bus with memory-mapped I/O  

The 6502 has a 16-wire address bus. This means that addresses are specified with a 16-bit number. A 16-bit number can range from 0000000000000000 to 1111111111111111. In decimal, this is from 0 - 65,535. Therefore, a 6502 could access 65,536 bytes of memory. However, not all possible memory addresses were connected to memory chips by the memory-decoding logic matrix. Some locations were reserved for I/O devices. The Apple II computer had an expansion bus into which I/O devices could be plugged. It worked something like the following:

In the early Apple II computers, the first 16,384 (16k) memory addresses were connected to memory chips. Therefore, if the memory address 0000000011111111 was placed on the address bus, the microprocessor would see the 256th byte of memory. If the address 0011111111111111 were placed on the bus, it would see the 16,384th byte of memory. Finally, if the address 010000000000000 were placed on the address bus, it would try to see the 16,385th byte of memory. However, there is no memory chip to connect to at this address.

This means that much of the memory address space available for memory was empty. Therefore, all these extra addresses are available for I/O devices. For example, an I/O device could be configured to connect to the data bus if it sees the number 010000000000000 on the address bus. Then, when the microprocessor attempts to read a byte of memory at address 0100000000000000, it will get whatever data the I/O device makes available.

The above shows the basics of how memory-mapped I/O works. The I/O device is configured to connect to the data bus when specific addresses are put on the address bus. When the microprocessor tries to manipulate data at such an address, it connects to the I/O device. For this to work, the memory subsystem has to ignore addresses where I/O devices connect.  

 Therefore, some memory addresses contain memory, and others connect to I/O devices.

The expansion bus with port-mapped I/O  

Port-mapped I/O works about the same as memory-mapped I/O. The main difference is that addresses don't have to be reserved for I/O devices. When the microprocessor is in I/O mode, the memory subsystem doesn't respond to any address on the address bus. Instead, the I/O devices are set to respond to addresses on the address bus.

 
 
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